Top 100 Vocabulary for Adults | Semiconductor Engineers
Semiconductor-engineering vocabulary is the language of controlling materials and manufacturing at microscopic scale so billions of devices can behave predictably together. Semiconductor engineers connect solid-state physics, wafer processes, lithography, deposition, etch, doping, metrology, yield, packaging and reliability into one tightly controlled production system.
This specialist flagship belongs to the eduKate Adult Vocabulary for Professionals system. It complements Nuclear Engineers, Photonics & Optical Engineers and Railway Engineers while remaining distinct from Computer, Electrical, Materials and Manufacturing Engineering.
The Four Banks
Device Physics: semiconductor, silicon, bandgap, valence band, conduction band, carrier, electron, hole, doping, donor, acceptor, intrinsic, extrinsic, junction, depletion region, electric field, mobility, resistivity, conductivity, recombination, generation, MOSFET, threshold voltage, leakage, breakdown.
Wafer Fabrication: wafer, crystal growth, ingot, oxidation, epitaxy, deposition, CVD, PVD, ALD, photoresist, lithography, mask, exposure, develop, etch, dry etch, wet etch, ion implantation, diffusion, anneal, CMP, cleanroom, contamination, process step, process integration.
Metrology & Yield: critical dimension, overlay, film thickness, defect density, particle, wafer map, metrology, inspection, SEM, ellipsometry, profilometry, sheet resistance, process window, control limit, SPC, variation, uniformity, repeatability, reproducibility, yield, die, good die, scrap, excursion, root cause.
Packaging & Reliability: dicing, package, die attach, wire bond, flip chip, bump, interconnect, substrate, underfill, encapsulation, thermal resistance, junction temperature, electromigration, time-dependent dielectric breakdown, hot-carrier degradation, reliability test, burn-in, qualification, failure analysis, delamination, moisture sensitivity, ESD, latch-up, lifecycle, product reliability.
Top 100 Semiconductor Engineering Vocabulary: Working Meanings
| # | Word | Professional meaning |
|---|---|---|
| 1 | Semiconductor | A material whose electrical conductivity can be controlled between insulating and conducting states. |
| 2 | Silicon | The dominant semiconductor material used in integrated circuits. |
| 3 | Bandgap | The energy difference between valence and conduction bands. |
| 4 | Valence band | The energy band normally occupied by bound electrons. |
| 5 | Conduction band | The energy band in which electrons can contribute to conduction. |
| 6 | Carrier | An electron or hole transporting electric charge. |
| 7 | Electron | A negatively charged carrier. |
| 8 | Hole | An effective positive charge associated with a missing electron in a valence band. |
| 9 | Doping | Intentional addition of impurities to control conductivity. |
| 10 | Donor | A dopant that contributes electrons. |
| 11 | Acceptor | A dopant that creates holes. |
| 12 | Intrinsic | Semiconductor material without intentional doping. |
| 13 | Extrinsic | Semiconductor material whose properties are modified by doping. |
| 14 | Junction | An interface between differently doped semiconductor regions. |
| 15 | Depletion region | A zone near a junction with reduced mobile-carrier concentration. |
| 16 | Electric field | A field exerting force on electric charge. |
| 17 | Mobility | The ease with which carriers move under an electric field. |
| 18 | Resistivity | A material property describing opposition to current flow. |
| 19 | Conductivity | A material property describing ability to conduct current. |
| 20 | Recombination | A process in which electrons and holes annihilate as mobile carriers. |
| 21 | Generation | Creation of electron-hole pairs. |
| 22 | MOSFET | A metal-oxide-semiconductor field-effect transistor used as a fundamental switching device. |
| 23 | Threshold voltage | The gate voltage at which a transistor channel begins to conduct strongly. |
| 24 | Leakage | Unwanted current flowing when a device is intended to be off or isolated. |
| 25 | Breakdown | Loss of intended insulating behaviour under excessive electric field. |
| 26 | Wafer | A thin semiconductor disk on which devices are fabricated. |
| 27 | Crystal growth | Formation of a controlled single-crystal semiconductor structure. |
| 28 | Ingot | A large cylindrical semiconductor crystal sliced into wafers. |
| 29 | Oxidation | Formation of an oxide layer on a semiconductor surface. |
| 30 | Epitaxy | Growth of a crystalline layer aligned with the substrate crystal. |
| 31 | Deposition | Formation of a material layer on a wafer. |
| 32 | CVD | Chemical Vapour Deposition using gas-phase reactions to form films. |
| 33 | PVD | Physical Vapour Deposition transferring material physically from a source to a wafer. |
| 34 | ALD | Atomic Layer Deposition forming highly controlled thin films one reaction cycle at a time. |
| 35 | Photoresist | A light-sensitive material used to define patterns. |
| 36 | Lithography | Pattern-transfer process used to define microscopic features. |
| 37 | Mask | A patterned plate used to selectively expose photoresist. |
| 38 | Exposure | Illumination of photoresist to define a pattern. |
| 39 | Develop | Chemical removal of selected photoresist regions after exposure. |
| 40 | Etch | Selective removal of material from wafer surfaces. |
| 41 | Dry etch | Plasma or gas-based material removal. |
| 42 | Wet etch | Liquid-chemical material removal. |
| 43 | Ion implantation | High-energy insertion of dopant ions into a wafer. |
| 44 | Diffusion | Thermally driven movement of dopants through a material. |
| 45 | Anneal | Heat treatment used to activate dopants or repair lattice damage. |
| 46 | CMP | Chemical Mechanical Planarization used to flatten wafer surfaces. |
| 47 | Cleanroom | A controlled environment with very low airborne contamination. |
| 48 | Contamination | Unwanted particles, chemicals or materials affecting device performance. |
| 49 | Process step | One defined operation in the wafer-fabrication sequence. |
| 50 | Process integration | Coordination of many fabrication steps into a functional device flow. |
| 51 | Critical dimension | A key feature size whose variation strongly affects device performance. |
| 52 | Overlay | Alignment accuracy between successive patterned layers. |
| 53 | Film thickness | The measured thickness of a deposited or grown layer. |
| 54 | Defect density | The number of defects per unit wafer area. |
| 55 | Particle | A small contaminant capable of causing pattern or device defects. |
| 56 | Wafer map | A spatial representation of die results across a wafer. |
| 57 | Metrology | Measurement science applied to semiconductor processes. |
| 58 | Inspection | Detection and review of process or pattern defects. |
| 59 | SEM | Scanning Electron Microscopy used for high-resolution imaging. |
| 60 | Ellipsometry | An optical technique used to measure thin-film properties. |
| 61 | Profilometry | Measurement of surface height or step features. |
| 62 | Sheet resistance | Electrical resistance of a thin conductive film expressed per square. |
| 63 | Process window | The range of process conditions producing acceptable results. |
| 64 | Control limit | A statistically derived boundary used to identify unusual variation. |
| 65 | SPC | Statistical Process Control used to monitor manufacturing variation. |
| 66 | Variation | Differences in process conditions or device outputs. |
| 67 | Uniformity | The consistency of a process result across a wafer or lot. |
| 68 | Repeatability | Consistency under the same measurement or process conditions. |
| 69 | Reproducibility | Consistency across different tools, operators or conditions. |
| 70 | Yield | The proportion of fabricated dies meeting acceptance criteria. |
| 71 | Die | An individual integrated circuit region cut from a wafer. |
| 72 | Good die | A die that passes required electrical and quality tests. |
| 73 | Scrap | Material or product rejected from further use. |
| 74 | Excursion | A significant process deviation outside expected control. |
| 75 | Root cause | A fundamental causal factor whose correction may reduce recurrence. |
| 76 | Dicing | Cutting a processed wafer into individual dies. |
| 77 | Package | The protective and electrical structure surrounding a semiconductor die. |
| 78 | Die attach | Bonding the semiconductor die to its package or substrate. |
| 79 | Wire bond | A fine-wire electrical connection between die and package. |
| 80 | Flip chip | A packaging method connecting the die face-down through bumps. |
| 81 | Bump | A small conductive connection used in advanced packaging. |
| 82 | Interconnect | A conductive path linking device elements. |
| 83 | Substrate | A supporting base carrying electrical and mechanical package functions. |
| 84 | Underfill | Material filling the gap beneath a flip-chip die to improve mechanical reliability. |
| 85 | Encapsulation | Protective sealing of semiconductor components. |
| 86 | Thermal resistance | Resistance to heat flow between junction and surroundings. |
| 87 | Junction temperature | The operating temperature of the active semiconductor region. |
| 88 | Electromigration | Movement of metal atoms under high current density, potentially causing interconnect failure. |
| 89 | Time-dependent dielectric breakdown | Progressive failure of an insulating dielectric under electric field over time. |
| 90 | Hot-carrier degradation | Device degradation caused by energetic carriers damaging interfaces or oxides. |
| 91 | Reliability test | A test stressing devices to assess long-term performance. |
| 92 | Burn-in | Early-life stress testing used to screen selected failures. |
| 93 | Qualification | Demonstration that a product meets required reliability and environmental standards. |
| 94 | Failure analysis | Structured investigation of why a device failed. |
| 95 | Delamination | Separation between bonded material layers. |
| 96 | Moisture sensitivity | Susceptibility of a package to damage from absorbed moisture during processing or use. |
| 97 | ESD | Electrostatic discharge capable of damaging semiconductor devices. |
| 98 | Latch-up | An unintended low-impedance condition in some integrated circuits that can cause excessive current. |
| 99 | Lifecycle | The period from process development through manufacturing, use and retirement. |
| 100 | Product reliability | The probability that a semiconductor product performs as intended over specified conditions and time. |
Yield Is a Map of Hidden Variation
A wafer can look nearly identical across its surface while microscopic variation shifts device behaviour enough to create yield loss. Semiconductor engineering therefore treats metrology, process control and defect learning as central design activities, not merely manufacturing inspection.
Seven-Day Semiconductor Engineering Vocabulary Plan
| Day | Practice |
|---|---|
| 1 | Connect band structure, carriers and junctions. |
| 2 | Trace a wafer through lithography, deposition and etch. |
| 3 | Map doping and thermal steps. |
| 4 | Review metrology, variation and yield. |
| 5 | Trace packaging into reliability mechanisms. |
| 6 | Recall 75+ semiconductor terms. |
| 7 | Write a one-page process review linking physics, fabrication, yield and reliability. |
Conclusion
Semiconductor-engineering vocabulary helps professionals connect nanoscale device behaviour to high-volume manufacturing. It makes physics, process integration, metrology, yield, packaging and reliability part of one precision-engineering language.