Semiconductor literacy is understanding how designers, materials, precision machines, cleanrooms, software and skilled workers turn microscopic structures into the chips that make modern technology possible. A student may use a phone, computer or electric appliance every day without knowing that its components can contain extraordinarily small electronic structures produced through repeated layers of manufacturing. The visible device is the final result of a much larger system of research, engineering, supply chains and quality assurance.
Ministry of Education V3.0 should teach semiconductor production as an example of advanced civilisation infrastructure. It connects Physics, Chemistry, Mathematics, manufacturing, technology, safety, logistics, economics and career pathways. This reference explains what a semiconductor is, distinguishes chip design from wafer fabrication and packaging, maps common high-level fabrication stages, provides a fictional yield calculation, and shows why research, supplier networks, equipment maintenance and human capability matter to production continuity.
This is an independent eduKateSG educational reference, not an official Singapore MOE fabrication syllabus or a technical process specification. Real semiconductor fabs use specialised equipment, hazardous chemicals, controlled environments, professional engineering rules and intellectual property. Students must not attempt chemical etching, handle fabrication gases, inspect restricted facilities or copy confidential process recipes.
1. Start With Function: What Does a Semiconductor Do?
A semiconductor is a class of material whose electrical properties can be controlled in useful ways. Silicon is widely used in electronic chips, but important devices also use other semiconductor materials such as silicon carbide and gallium nitride for certain applications. A chip can contain many components built into microscopic structures, including transistors that help control electrical signals. Different devices have different functions; a processor, memory component, sensor and power-management chip should not be treated as identical.
Students can begin with the question, ‘Which part of an electronic system needs computation, memory, sensing, signal control or efficient power conversion?’ The purpose determines what kind of chip is useful and which capabilities matter. A phone is not made more intelligent simply by including a larger number of chips.
Singapore’s Economic Development Board semiconductor industry overview provides a contemporary view of the country’s industry, including wafer production, semiconductor manufacturing equipment, advanced materials and packaging. It is a source for industry context, not a licence to describe the confidential processes inside particular firms.
2. Chip Design and Chip Manufacturing Are Different Businesses
| Activity | What it contributes | Learning question |
|---|---|---|
| Architecture and design | Defines the desired electronic function and circuit behaviour | What must the chip accomplish and under which limits? |
| Electronic design automation | Uses software to describe, test and validate aspects of a design | Why must errors be caught before expensive fabrication? |
| Wafer materials | Supplies suitable substrates and other controlled materials | What properties and standards make the inputs usable? |
| Front-end fabrication | Builds multiple patterned device structures and connections on wafers | Why are repeated precision processes necessary? |
| Wafer testing | Checks relevant electronic properties and faults | How is acceptable output distinguished from attempted production? |
| Assembly and packaging | Protects and connects individual dies for their intended application | Why is a working die not yet the complete product? |
| Final testing and integration | Checks completed components and downstream operation | Which performance and safety requirements remain? |
A single company may perform several functions, while a semiconductor supply chain may also distribute them across specialist organisations and countries. The division between design, fabrication and packaging is educationally useful because it exposes distinct bottlenecks and forms of expertise.
3. What Happens Inside a Wafer Fabrication Facility?
ASML’s illustrated explanation of how microchips are made describes chips as layers of interconnected microscopic patterns built on a wafer through many manufacturing stages. Its six crucial manufacturing steps introduces deposition, photoresist, lithography, etching, changes to material properties and packaging at a broad level.
The key educational idea is iterative construction. A wafer may travel repeatedly among specialised machines while successive patterned layers are built, modified and checked. It is not a case of printing a complete modern chip in one pass. The exact sequence, materials and controls depend on device type and process technology.
4. Eight Rooms in a Chipmaking Route
| Room | Purpose | Potential failure |
|---|---|---|
| Functional specification | Defines what the device must do | Requirements are misunderstood |
| Wafer and materials | Supplies carefully specified substrates and thin films | A material lacks necessary consistency |
| Pattern formation | Transfers designed structures through controlled lithographic steps | A structure does not match its intended pattern |
| Material processing | Deposits, removes or modifies layers appropriately | Process variation creates defects |
| Measurement and quality | Checks dimensions, properties and appropriate standards | Defects go undetected or too many usable units are rejected |
| Assembly and testing | Protects, connects and validates components | A working die is damaged or cannot be integrated |
| Industrial dependencies | Supplies equipment, workers, energy, water and maintenance | One specialised input interrupts production |
| Delivery and return | Moves acceptable devices to customers and corrects failures | A quality problem reaches downstream products |
This is not a process recipe. Detailed lithography, doping, deposition, wet and dry chemistry, thermal processing and cleanroom practices are professional disciplines with safety and intellectual-property requirements. School learning can use diagrams and publicly approved video descriptions without attempting laboratory reproduction.
5. Twelve Questions for a Semiconductor Systems Audit
- Which electronic function does the component provide?
- Is the topic chip architecture, a wafer, a finished die or a packaged device?
- Which organisation or public source describes the process?
- What material and equipment dependencies are established rather than guessed?
- Which major stages must occur in sequence and which may run in parallel?
- Why are controlled environments and qualified personnel important?
- Which manufacturing metric is being reported: wafers, dies, chips, yield or revenue?
- What is counted as a functional device under the stated test?
- Where can errors occur and which professional team has the authority to correct them?
- What upstream supply or logistics constraints might affect delivery?
- Which environmental, energy, water and labour questions require separate evidence?
- How will the learner apply the same dependency logic to another advanced product?
6. The Cleanroom Lesson: The Environment Is Part of the Product
At microscopic scales, unwanted particles, unwanted chemical interactions and variations in process conditions can have serious effects. Semiconductor fabs therefore use carefully controlled environments, specialised handling, monitoring and trained personnel. The cleanroom is not a decorative feature or simply a sign that workers must dress alike. It is part of a demanding manufacturing system.
A class may model this concept safely by comparing how dust affects a large printed picture versus a very small drawn feature, while making clear that the analogy is imperfect. Students should not handle semiconductor-processing chemicals, attempt sterile manufacturing or claim their classroom test replicates fab conditions.
7. Lithography Is Precision Patterning, Not a Magic Chip Printer
Lithography transfers pattern information into a photosensitive coating as part of a multilayer process. Other stages subsequently modify material. ASML’s explanation discusses reticles, optical systems, photoresist and repeated wafer processing. Students should recognise the dependence of pattern quality on optics, materials, machines and metrology.
A simple paper analogy can use a stencil to represent the idea of pattern transfer, not the actual optics or dimensions of a modern fabrication process. A good teacher explicitly states where the analogy fails: a silicon wafer is not paper, and advanced lithography is far more complicated than ordinary printing.
8. A Fictional Wafer Yield Calculation
Teaching arithmetic only; real fabs have far more complex yield accounting. Suppose a fictional wafer layout contains 160 testable dies and 136 pass the stated functional test. The illustrative die yield is 136 ÷ 160 = 85%. If a later packaging stage accepts 129 of those 136, the simplified package-stage yield is approximately 94.85% and the overall accepted count is 129 of 160, or approximately 80.6%.
Students should distinguish the different denominators. The wafer test yield, packaging-stage yield and overall accepted share are not the same. Real calculations can also depend on die size, wafer edge losses, testing criteria, rework, different process layers and other factors. A higher yield may represent an improvement in manufacturing capability, but a single percentage does not establish total production cost or product quality.
| Measure | Fictional value | What it means |
|---|---|---|
| Potential dies tested | 160 | Population in the given exercise |
| Dies passing wafer test | 136 | 85% of the stated population |
| Accepted packaged units | 129 | 129/136 pass-through after the preceding stage |
| Overall accepted units | 129 | 129/160 under this simplified chain |
| Actual industrial output | Unknown | Cannot be inferred without production context |
9. Singapore’s Semiconductor Ecosystem
A May 2026 Singapore EDB article reports that Singapore accounted for approximately one in ten chips and one in five units of semiconductor equipment worldwide, and attracted more than S$30 billion in semiconductor investments between 2022 and 2025. These figures describe different industry measures and should not be added together.
The same source describes a network of global manufacturers and domestic suppliers working across semiconductor activity. The educational significance is specialisation: a chip’s journey depends on more than the company whose logo appears on the eventual electronic device. Precision engineering, chemicals, facility systems, intellectual property, research, logistics and skills are all part of the route.
Singapore also announced investments under its RIE2030 semiconductor research agenda. The EDB’s March 2026 report describes S$800 million committed to semiconductor research and development, including attention to power electronics and compound semiconductor technologies. These are research commitments, not proof that every planned facility or commercial result has already been realised.
10. A Fictional Supplier Interruption
A small design company plans to fabricate an approved educational demonstration chip through a professional partner. One essential test-equipment service is delayed. Students receive a fictional process map and must identify whether additional raw silicon, extra design software or an alternative approved testing arrangement would address the actual bottleneck.
The correct answer is conditional on the process requirements. Adding a different resource to a non-bottleneck stage may not restore throughput. The exercise builds on Manufacturing and Supply Chain Literacy and Measurement and Calibration Literacy. It does not attempt to reveal supplier-specific processes or operational vulnerabilities.
11. Energy, Water and Labour Are Part of the Route
Semiconductor manufacturing is a resource-intensive technical activity whose environmental and labour impacts depend on the facility, process and supply chain. A responsible student should ask about energy and water use, professional safety, specialist workforce development and product lifecycle without inventing quantitative impacts from one publicity photograph.
A fab’s manufacturing performance cannot be evaluated solely by electrical power used or by wafers started. Similarly, an R&D facility’s usefulness should not be reduced to immediate mass-production volume. Define the relevant output and operating period before making a fair comparison.
12. An Age-Based Learning Progression
| Stage | Student activity | Safeguard |
|---|---|---|
| Primary 1–3 | Recognise that phones and computers contain many specialised parts | Images and teacher-led discussion only |
| Upper primary | Trace a simplified chip from design to device | No technical processing tasks |
| Lower secondary | Describe materials, patterning, testing and packaging at conceptual level | Public diagrams and fictional data |
| Upper secondary | Calculate yield, identify bottlenecks and compare input resources | Explicitly simplified numerical models |
| Pre-university | Explore semiconductors, supply chains and specialised research roles | No confidential process, chemistry or cleanroom activities |
| Adult learning | Interpret manufacturing reports and real qualification pathways | Professional safety and licensing remain applicable |
13. Forty-Five-Minute Chip Systems Lesson
| Minutes | Activity | What is produced |
|---|---|---|
| 0–7 | Select a useful electronic function and device type | Functional specification |
| 7–15 | Build an eight-room wafer-to-chip route | Dependencies and stage meanings |
| 15–23 | Compare design, fab, test and packaging roles | Organisational map |
| 23–31 | Calculate fictional stage and overall yields | Correct ratios and denominators |
| 31–38 | Introduce a supplier bottleneck and a resource constraint | Conditional response with uncertainty |
| 38–45 | Transfer the method to a different chip application | Independent route explanation |
14. Performance Rubric
| Criterion | Developing | Proficient | Advanced |
|---|---|---|---|
| Function | Names microchips without explaining their use | Connects electronic functions to appropriate chip roles | Distinguishes design and system constraints |
| Production | Describes a single printing step | Explains repeated fabrication, checking and packaging | Identifies dependencies without inventing process recipes |
| Numeracy | Quotes yield without defining it | Calculates stated stage and overall yields | Tests a bottleneck or changed denominator |
| Evidence | Treats promotional statistics as universal truth | Preserves year, issuer, scope and measurement | Explains why industry measures are not directly comparable |
| Professional responsibility | Suggests unapproved practical experiments | Recognises cleanroom and industrial safety roles | Builds a legitimate research or career enquiry |
15. The Gold Standard
A semiconductor-literate learner can explain how an electronic function becomes a manufactured component, identify the roles of materials, patterns, testing and packaging, interpret basic production quantities, and understand why specialist workers and international supply networks matter. They do not need to operate fabrication machinery to understand its importance.
The broader civilisational insight is that digital capability rests on physical manufacturing, scientific knowledge and reliable institutions. A society can use advanced AI and software only because many layers of engineering and education keep the underlying hardware possible.
Connected Reference Library and Official Sources
- MOE V3.0 — Reference Library
- Reference 44 — Manufacturing and Supply Chains
- Reference 57 — Measurement and Calibration
- Reference 21 — Future Career Pathways
- Reference 61 — Data Centres and Cloud Computing
- ASML — How Microchips Are Made
- ASML — Six Semiconductor Manufacturing Steps
- Singapore EDB — Semiconductor Industry
- Singapore EDB — Semiconductor Ecosystem (May 2026)
- Singapore EDB — Semiconductor R&D (March 2026)