Outcome Reliability Under Time Pressure (Cross-Subject Variance Control) — Sensor Pack + Repair Router + Pri 5–6 Simulation Cycles

Definition (PSLE OS):
PSLE OS is the high-stakes gate layer that converts Primary learning into reliable exam outcomes under time, across multiple subjects. It is not a syllabus. It is a variance-control system: it detects instability, truncates accelerating failure, and stitches performance back onto a stable trajectory using simulations + repair loops.

Lock: PSLE is not mainly “hard questions.” It is time + mixed-topic + pressure inversion. The job is to turn P2 capability into P3 reliability.

0) P3 Mastery Definition (LOCKED)

P3 in PSLE OS =
A student produces stable marks across full-length papers (English/Math/Science) with low variance across weeks, minimal easy errors under time, correct method routing under mixed questions, and robust recovery after mistakes.

1) PSLE OS Core Output (what it must produce)

PSLE OS must output 5 system outcomes:

Low variance across mocks (distribution tightens)
Low easy-error rate under time
Stable routing under mixed-topic papers
Stamina + end-of-paper integrity
Recovery control (no spiral collapse after mistakes)

2) The 6 Dominant PSLE Failure Modes (Top 6, LOCKED)

FM1 — “Homework P2, Exam P1” collapse

Student performs at home but collapses under time and stakes.

Signature: big gap between untimed and timed scores.

FM2 — Easy-error leakage (careless marks loss)

Marks lost on simple items due to:

rushing
sloppy working
skipping checks

Signature: high wrong answers on low-difficulty questions.

FM3 — Misrouting under mixed papers

Student chooses wrong methods when topics are mixed.

Signature: time loss + wrong setup even when content is known.

FM4 — Transfer brittleness (novel skins collapse)

Student fails when question format changes:

reverse/inverse
real-world context
new diagram/table

Signature: unstable performance on application-style questions.

FM5 — End-of-paper degradation (stamina collapse)

Last 20–30% of paper collapses:

accuracy drops
time panic increases

Signature: tail-end error spike.

FM6 — Emotional spiral after mistakes

One mistake triggers:

panic
speed-up
further errors

Signature: performance cliff after a single error.

3) PSLE OS Sensor Pack (Cross-Subject Instrument Panel)

Z0 Sensors (micro, per paper)

S-PSLE-01: timed score vs untimed score gap
S-PSLE-02: easy-error count per 20 marks
S-PSLE-03: wrong-method (misrouting) count
S-PSLE-04: check habit rate (did student verify?)
S-PSLE-05: recovery time after mistake (minutes to stabilise)

Z1 Sensors (pattern, by subject)

S-PSLE-06: transfer gap (standard vs novel skin)
S-PSLE-07: question-type weakness map (e.g., inference, experiment, ratio)
S-PSLE-08: concept-to-method routing accuracy rate

Z2 Sensors (system readiness, across weeks)

S-PSLE-09: mock-to-mock variance spread (main KPI)
S-PSLE-10: end-of-paper degradation index
S-PSLE-11: time-per-mark drift stability
S-PSLE-12: completion rate (full paper done)
S-PSLE-13: fatigue error cluster map (which errors rise when tired)

Z3 Sensors (pipeline health)

S-PSLE-14: repair loop adherence (error logs + retests done)
S-PSLE-15: simulation frequency (weekly full papers)
S-PSLE-16: intervention timing (months before PSLE)

4) PSLE OS Repair Router (Executable Decision System)

Router Rule R1 — If timed vs untimed gap is large → build timed stability (not more practice)

Trigger: S-PSLE-01 high
Truncation: stop new topics and long worksheets
Stitching: Stability Ladder (accuracy→pace→timed micro→full sim)
Verify: timed gap shrinks across 2–3 cycles

Router Rule R2 — If easy-error count is high → install computation/grammar integrity protocols

Trigger: S-PSLE-02 high
Truncation: reduce speed pressure temporarily
Stitching: neat working + checklists + inverse checks + proofreading loop
Verify: easy-error count halves within 2–4 mocks

Router Rule R3 — If misrouting is high → routing drills become mandatory

Trigger: S-PSLE-03 high
Truncation: stop full mixed papers briefly
Stitching: “decision-before-execution” drills + tool library review
Verify: wrong-method count drops sharply in mixed sets

Router Rule R4 — If novel questions collapse → 5-skins transfer inoculation

Trigger: S-PSLE-06 gap high
Truncation: stop repeating same-format questions
Stitching: 5-skins loop for each weak concept (standard/word/diagram/inverse/novel)
Verify: novel-skin accuracy rises; transfer gap shrinks

Router Rule R5 — If end-of-paper collapses → stamina + pacing protocol

Trigger: S-PSLE-10 high
Truncation: stop doing only “first half” practice
Stitching: full papers + pacing plan + “bank easy marks early” strategy
Verify: tail-end error spike reduces; completion rate rises

Router Rule R6 — If spiral after mistakes occurs → recovery protocol (stop-loss)

Trigger: S-PSLE-05 slow recovery
Truncation: prevent panic acceleration
Stitching (Recovery Protocol):

pause 10 seconds
mark the question and move on
do 2 easy questions to regain stability
return later with a fresh method

Verify: fewer performance cliffs after mistakes

5) The PSLE Simulation Engine (Pri 5–6 operating schedule)

PSLE OS runs on simulation cycles:

Cycle A — Weekly full simulation (minimum)

1× English paper segment simulation
1× Math full timed paper (alternating Paper 1/2 patterns)
1× Science mixed section simulation

Cycle B — Post-simulation repair (mandatory)

Within 24–48h:

error log classification
targeted re-do (untimed)
re-do under time (micro set)
7-day retest

Cycle C — Variance tracking (the KPI)

Track:

variance spread across 3–5 mocks
easy-error rate trend
end-of-paper degradation trend

PSLE success is visible weeks before the exam when variance collapses.

6) Cross-Subject “PSLE Control Dials” (Operator knobs)

Use these to shrink/expand difficulty safely:

Time compression (shorter time increases pressure)
Mixed-topic density (more mixing increases routing demand)
Novel skin density (transfer demand)
Stamina length (fatigue exposure)
Stakes simulation (strict marking, quiet room, no hints)

Dial up only when stability holds.

7) Z0–Z3 Almost-Code Directory (PSLE OS Block)

PSLE OS — Directory Block (Failure → Sensors → Repairs → Verification)

Failure Mode	Key Sensor	Repair Loop	Verification Signal
Homework P2, Exam P1	timed/untimed gap	stability ladder	gap shrinks
Easy-error leakage	easy-error count	integrity protocols	errors halve
Misrouting	wrong-method count	routing drills	misrouting drops
Novel collapse	transfer gap	5-skins loop	novel accuracy up
End collapse	tail error spike	stamina + pacing	degradation down
Spiral mistakes	recovery time	stop-loss protocol	fewer cliffs

8) Failure Mode Trace (schematic, required)

Practice volume rises → timed stability not trained → easy errors leak → misrouting under mixed papers → novel skins collapse → end-of-paper fatigue spike → one mistake triggers spiral → mock variance widens → PSLE outcomes become unreliable.
PSLE OS fixes this by simulation + repair loops until variance collapses.

9) LOCK-WORTHY PSLE OS statement

PSLE OS is a variance-control system: it converts capable students into reliable scorers under time by running simulations, logging error types, inoculating transfer, and training recovery—until mock variance collapses.

PSLE OS (V1.1)